x86 Assembly

x86 Registers
Below is a breakdown of the CPU registers found in the 8086

General Purpose x86 Registers: ax bx cx dx (16-bit Word registers) ah al bh bl ch cl dh dl (High and low bit portion)

The GP registers aren't dedicated to any single function, but they do have common uses to include:
  • ax - accumulator register typically stores results from other operations
  • bx - typically used to store the base address of memory for an array or an offset address
  • cx - typically used as a counter register
  • dx - typically used as the data extension register for division and multiplication operations to store the operand

x86 Memory Segment Registers: (code segment) (data segment) (stack segment) (extra segment) cs ds ss es
The segment registers were used to address more than 64k of memory in the 8086 and 20286:
  • cs - held the base adddress of the current code segment
  • ds - held the base address of the current data segment
  • ss - held the base address of the current stack segment
  • es - held held the base address of any additional data segment
These registers are no longer used for memory segmentation since modern x86 CPUs use a flat memory model
Pointers and Index Registers: (base pointer) (stack pointer) bp sp
  • sp - always stores the address of the newest element in the stack, this will be the lowest memory address in the stack
  • bp - when multiple functions are nested, the base pointer stores the address of the calling function's base pointer
The stack will be examined in detail when we explore functions.

(instruction pointer) (source index) (dest. index) ip si di
  • ip - stores the address of the next instruction that should be executed, this is an essential register
  • si - typically used to store a memory location for string or memory operations, the address where the value is copied from
  • di - typically used to store a memory location for string or memory operations, the address where the value is copied to
Flag register:
  • 16-bit register that stores states for arithmatic logic unit (ALU) operations
  • Contains a bitmap showing what flags are set
bit 0x0F 0E 0D 0C 0B 0A 09 08 07 06 05 04 03 02 01 00 Flag 00 00 00 00 OF DF IF TF SF ZF 00 AF 00 PF 00 CF
  • 00: Not used or reserved
  • OF: Overflow Flag, indicates whether (1) or not (0) an overflow occured during a math operation
  • DF: Direction Flag, indicates the direction that strings should be process in memory, lower to higher memory (0) or higher to lower (1)
  • IF: Interrupt Flag, indicates whether (1) or not (0) maskable (optional) hardware interrupts should be processed
  • TF: Trap Flag, indicates whether (1) or not (0) commands should be executed a single step at a time
  • SF: Sign Flag, indicates the sign of a number for signed operations, negative (1), or positive (0)
  • ZF: Zero Flag, indicates whether the result of a logic test is zero (1) or not zero (0)
  • AF: Auxiliary Flag, indicates whether there is a carry (1) or not (0) between the low nibble and high nibble or 8-bit instructions
  • PF: Parity Flag, indicates whether there is an even (1) or odd (0) number of bytes in a value
  • CF: Carry Flag, indicates whether (1) or not (0) there is a value that is carried or borrowed by math operations

A complete reference to the x86 architecture can be downloaded from Intel here
x86 Extended Registers
The 80386 processor extended the registers from the 16-bits used by the 80286 and 8086 to 32-bits. An "e" was added to the register names to indicate that they are used for the extended 32-bit operations.
GP Registers: 32-bit (dword/long) 16-bit (word) (8086) 8-bit (byte) (8086) eax ax ah al ebx bx bh bl ecx cb ch cl edx dx dh dl Pointer and Index Registers: esp sp ebp bp esi si edi di eip ip
Segment Registers:
The 80386 also added two additional segment registers.
  • fs (frame segment), used in x86 for managing protected mode segmented memory
  • gs (general segment), used for x86 protected memory, used by x86_64 still for special purpose OS tasks
Extended Flag (EFLAG):
80386 also extended the x86 flag register to 32-bits
bit 0x1F 1E 1D 1C AB 1A 19 18 17 16 15 14 13 12 11 10 0F 0E 0D 0C 0B 0A 09 08 07 06 05 04 03 02 01 00 Flag 00 00 00 00 00 00 00 00 00 00 00 00 00 00 VM RF 00 NT PL PL OF DF IF TF SF ZF 00 AF 00 PF 00 CF
  • 00: Not used or reserved
  • PL: Privilege level flag, this is a 2-bit flag indicating the privilege level of an IO instruction from 0-3 (system defined)
  • NT: Nested task flag, indicates whether (1) or not (0) a process is executing as a next task (system defined)
  • RF: Resume flag, indicates whether (1) or not (0) execution should resume after a debug exception
  • VM: Virtual mode flag, indicates whether (1) or not (0) commands should be executed in virtual-8086 mode